In related art, there is a semiconductor integrated circuit in which a plurality of semiconductor circuits each of which includes a plurality of metal oxide semiconductor (MOS) transistors are provided and the semiconductor circuits are divided into regions in accordance with operation rate per unit time of each of the semiconductor circuits (for example, refer to Japanese Laid-open Patent Publication No. 2005-166698).
There is a semiconductor integrated circuit which is provided with a threshold voltage control circuit which controls a threshold voltage of MOS transistors used in a semiconductor circuit included in a corresponding region and a power-supply voltage control circuit which controls a power-supply voltage supplied to a semiconductor circuit included in a corresponding region, in each region of semiconductor circuits which are divided into regions.
Here, a semiconductor integrated circuit of related art includes semiconductor circuits which are divided into regions, but it is difficult to reduce overhead because circuits such as a level shifter have to be provided to the semiconductor integrated circuit.